Conductor plates (“layers”) or printed circuit boards (PCBs) are typically made of one or more panels of insulating or dielectric material having a continuous thin-layer of a conductive material, such as copper, laminated one or both sides thereof. A desired layout or pattern of conducting paths and connection areas of printed circuits is then made by removing selected regions of the conductive layer from the dielectric material, to produce a PCB. One or more devices (typically integrated circuits) are then formed on or mounted on the PCB.
More specifically, each panel of the PCB typically includes a dielectric material, such as resin-impregnated fiberglass cloth layer (“dielectric layer”). The panel further includes thin conductive layers (e.g., copper foil) laminated to each side of the dielectric layer. The thin-laminate panels provide necessary capacitance for all or a substantial number of the integrated circuits formed on the “capacitive” PCB.
Conventional PCBs are made of multiple, thick panels (termed “thick laminates”) having a thickness of about 0.059 inches or more (i.e., about 1.5 mm). However, electrical engineers are designing integrated circuits that require thinner and thinner dielectric spacing between the conductive layers that form the printed circuits. Accordingly, the thickness of the dielectric material in such panels (and thus the distance between the conductive layers) has become relatively small, typically about 0.006 inches (i.e., about 1.5 mm) or less. The actual thickness of a particular dielectric layer of a thin-laminate panel is determined based on the level of capacitance necessary for the particular integrated circuits to be formed on the capacitive PCB made from the panel. Such laminate panels are termed “thin laminates” or “thin-laminate panels.”
The failure rate of the thin-laminate panels used to make capacitive PCBs is often high due to manufacturing defects in the thin-laminate panels themselves. The thin-laminate panels are often defective due to various factors, such as impurities in the material comprising the dielectric layers of the panels. Conductive material introduced into the dielectric layers typically causes shorts between the conductive layers forming the circuit layers (defined by the selective removal of the conductive layers). Thus, the panels would be preferably tested for such manufacturing defects prior to processing the panels to produce the capacitive PCBs. Unfortunately, the prior art thin-laminate panels cannot be accurately tested prior to processing of the PCBs due to the presence of conductive material on the edges of the dielectric layers of the panels.
Specifically, thin-laminate panels are initially made in large sheets and the sheets are then sheared into relatively small panels from which PCBs are made. With reference to the prior art thin-laminate panel illustrated in FIG. 1(a), as the large sheets of thin laminate are cut or sheared to provide multiple thin-laminate panels, the relatively soft conductive layer 6 of the laminate typically smears and spreads conductive material 6a across one or more edges 12 of the panel. The connection of the two conductive layers 6 formed via the smeared conductive material 6a makes it difficult to accurately test such panels for electrical deficiencies.
More particularly, the panels would preferably be tested for undesirable electrical connection between the two conductive layers of the panel due to the presence of conductive material within the dielectric layers. Such an electrical connection through the dielectric layer will not be removed with subsequent processing of the PCB. Thus, the connection through the dielectric layer may result in a defective PCB. When testing the panels for such impurities, electrical connection between the two conductive layers due to conductive material on the edge(s) of the dielectric layer, results in false failures. That is, the conductive material on the panel edges make it appear as though there is electrical conductance through the dielectric layer. Put another way, the smeared conductive material on the dielectric layer edge(s) results in short circuits between the conductive layers of the panel, signifying that the panel is defective due to electrical conductance through the dielectric layer, even though the thin-laminate panel may not be defective. The short circuits at the edges of the panels may be avoided by subsequent PCB processing of the panels. However, because conductive material on the edges of the thin-laminate panels cause short circuits that provide false failures, the panels are not tested before processing the panels to produce the PCBs. That is, if the panels are tested before processing the PCB, otherwise non-defective thin-laminate panels are discarded as being defective due to false failures caused by the smeared conductive material. PCB processing of the panels is both expensive and time consuming as are the laminate panels themselves. Thus, effective and accurate testing of the thin-laminate panels before processing the PCBs and the avoidance of false failures provide distinct advantages.
Referring to the prior art thin-laminate panel illustrated in FIG. 1(b), cutting of the panel need not result in conductive material 6a being smeared completely across an edge 12 of the dielectric layer 8 to cause problems. That is, smeared conductive material that only partially covers an edge 12 of a dielectric layer 8 reduces the already small distance between the conductive layers 6 of the panel 2. This reduced distance between the conductive layers makes it difficult to accurately test such panels for electrical deficiencies. When testing the panels, the reduced distance typically allows conduction of electricity from one conductive layer to the other, making it appear as though there is electrical conductance through the dielectric layer. Such panels are then discarded as defective because it is impossible to determine whether the “short circuit” is due to conductive impurities in the dielectric layer or is simply due to conductive material on the edges of the dielectric layer (which would be eliminated during processing of the PCBs). Accordingly, with thin-laminate panels even a minor amount of conductive material on the edge of the dielectric layer may be detrimental.
Because conventional PCBs are made from thick-laminate panels (e.g., about 0.059 inches (about 1.5 mm)), conductive impurities in the dielectric material is typically not a problem due to the relatively thick layer of dielectric material. In other words, the relatively large mass of dielectric material of the dielectric layer typically limits any deleterious affects of such conductive impurities. As a result, conductive material on the edges of the dielectric layer of thick-laminate panels typically is not a problem as the thick- laminate panels need not be tested.
In the past, bevelers have been used to give the edges of thick-laminate panel PCBs a rounded profile. The rounded profile makes the thick-laminate panel PCBs safer to handle. Such beveling does not (and was not intended to) produce any electrical benefits. That is, once the laminate panels are processed to define the PCBs, there is not any conductive material located at regions of the laminates that would result in smearing. Additionally, current beveling processes require that the thick-laminate PCBs be beveled one at a time.
Accordingly, there is a need for thin-laminate panels for the production of PCBs, wherein the thin-laminate panels have edges that have been finished so that the edges are free of conductive material. The absence of conductive material on the edges of the dielectric layers of the panels allows testing of the panels for manufacturing defects prior to processing of the PCBs and avoids discarding non-defective thin-laminate panels due to false failures. Further, there is a need for methods for finishing edges of thin-laminate panels in a manner that does not cause smearing of conductive material along the edges of the dielectric layers and apparatus for performing the same.